Memory modules are widely used in a variety of electronic systems, especially Personal Computers (PC's). Memory modules are built to meet specifications set by industry standards, thus ensuring a wide potential market. High-volume production and competition have driven module costs down dramatically, benefiting the PC buyer.
Memory modules are made in many different sizes and capacities, such as older 30-pin and 72-pin single-inline memory modules (SIMMs) and newer 168-pin, 184-pin, and 240-pin dual inline memory modules (DIMMs). The “pins” were originally pins extending from the module's edge, but now most modules are leadless, having metal contact pads or leads. The modules are small in size, being about 3-5 inches long and about an inch to an inch and a half in height.
The modules contain a small printed-circuit board substrate, typically a multi-layer board with alternating laminated layers of fiberglass insulation and foil or metal interconnect layers. Surface mounted components such as DRAM chips and capacitors are soldered onto one or both surfaces of the substrate.
FIG. 1 shows a fully-buffered memory module. Memory module 10 contains a substrate such as a multi-layer printed-circuit board (PCB) with surface-mounted DRAM chips 22 mounted to the front surface or side of the substrate, as shown in FIG. 1, while more DRAM chips 22 are mounted to the back side or surface of the substrate (not shown). Memory module 10 is a fully-buffered dual-inline memory module (FB-DIMM) that is fully buffered by Advanced Memory Buffer (AMB) 24 on memory module 10.
Metal contact pads 12 are positioned along the bottom edge of the module on both front and back surfaces. Metal contact pads 12 mate with pads on a module socket to electrically connect the module to a PC's motherboard. Holes 16 are present on some kinds of modules to ensure that the module is correctly positioned in the socket. Notches 14 also ensure correct insertion of the module. Capacitors or other discrete components are surface-mounted on the substrate to filter noise from the DRAM chips 22.
As system clock speeds increase, data must be transmitted and received at ever-increasing rates. Differential signaling techniques are being used to carry data, clock, and commands to and from memory modules. AMB 24 is a chip mounted onto the substrate of memory module 10 to support differential signaling through metal contact pads 12. AMB 24 sends and receives external packets or frames of data and commands to other memory modules in other sockets over differential data lines in metal contact pads 12.
AMB 24 also extracts data from the external frames and writes the extracted data to DRAM chips 22 on memory module 10. Command frames to read data are decoded by AMB 24. AMB 24 sends addresses and read signals to DRAM chips 22 to read the requested data, and packages the data into external frames that are transmitted from AMB 24 over metal contact pads 12 to other memory modules and eventually to the host processor.
Memory module 10 is known as a fully-buffered memory module since AMB 24 buffers data from DRAM chips 22 to metal contact pads 12. DRAM chips 22 do not send and receive data directly from metal contact pads 12 as in many prior memory module standards. Since DRAM chips 22 do not directly communicate data with metal contact pads 12, signals on metal contact pads 12 can operate at very high data rates.
Memory modules without AMB 24 are still being made. Such unbuffered memory modules carry address, data, and control signals across metal contact pads 12 from the motherboard directly to DRAM chips 22. Some memory modules use simple buffers that buffer or latch some of these signals but do not use the more complex serial-packet interface of a FB-DIMM.
DRAM chips may have a very large capacity, such as 512 Mbits, or half a giga-bit. The large number of memory cells, small size of individual memory cells, and overall large area of the DRAM die cause manufacturing defects to be somewhat common. DRAM chips are tested on a wafer before being separated and packaged, but this wafer-sort test may not catch all defects. A probe card is used to make contact with individual die on the wafer, causing a very noisy test environment. Thus test speeds are limited at wafer sort, preventing more exhaustive testing that could catch more defects.
Thus some packaged DRAM chips are going to contain defects. Further testing of packaged DRAM chips may be performed cost-effectively at higher speeds, allowing defective DRAM chips to be identified and discarded. However, discarding packaged DRAM chips is somewhat wasteful, since often only a single defect is present. For example, a defect may cause only 1 of the half-billion memory cells to fail. Nearly half a billion memory cells operate properly on a DRAM chip having a single defect, yet this chip is typically discarded.
Some DRAM chips are repairable. A fuse on the die may be blown using a laser during wafer sort, or some other method may be used. This repair may be attempted and performed to determine which DRAM chips are good and which are bad, or repair may be a separate step. Repair often causes the full size of memory to be available when repair is successful. For example, repairing a bad memory cell on a 512 Mbit DRAM allows a full 512 Mbits to be usable, since the bad memory cell is replaced by a redundant memory cell during repair.
Rather than repairing chips, some chip manufacturers may downgrade DRAM chips to lower capacities. For example, a 1 giga-bit DRAM die with a defect may be downgraded, packaged, and sold as a half giga-bit DRAM.
Manufacturers of memory modules may purchase packaged DRAMs that have a variety of levels of testing already performed. Cost may be reduced by purchasing packaged DRAMs that have not yet been exhaustively tested. The memory module manufacturer may arrange to more fully test these incoming DRAM chips to weed out DRAM chips with single defects.
What is desired is memory module that can be constructed with downgraded DRAM chips. A memory module that can accept downgraded memory chips to produce a reduced-capacity memory module is desirable. A process to test partially-tested DRAM chips, downgrade faulty chips, and use the downgraded chips on memory modules is desirable.